1. Field
The present disclosure relates to semiconductor materials. More particularly, the present disclosure relates to methods of forming relaxed semiconductor layers with reduced defects.
2. Description of the Related Art
In the field of semiconductor devices, there is increasing interest in adding high germanium content to silicon, i.e., Si1-xGex to boost the hole mobility of p-type metal-oxide semiconductor (p-MOS) devices. However, high quality, pure large diameter Si1-xGex substrates are expensive to fabricate. Thus, it is desirable to grow high germanium content Si1-xGex layers via heteroepitaxy on the readily available and cost-effective silicon substrates.
One problem with the growth of high germanium content Si1-xGex layers on silicon substrates, however, is the large lattice mismatch between silicon and germanium. Germanium has an in-plane lattice constant that is about 4% larger than the in-plane lattice constant of silicon. When a high germanium content Si1-xGex layer is grown via heteroepitaxy on a silicon substrate, this lattice mismatch between Si1-xGex and Si can result in the formation of a large number of defects, such as threading dislocations, in the Si1-xGex layer, as discussed in more detail below.
In order to form high germanium Si1-xGex layers on silicon substrates, it is known to use a low germanium content Si1-yGey buffer layer as a virtual substrate. That is, a Si1-yGy buffer layer may be formed on a silicon substrate, and a Si1-xGex layer may subsequently be grown on the Si1-yGey buffer layer. The Si1-yGey buffer layer, which acts as a transition layer between a silicon substrate and a high germanium Si1-xGex epitaxial layer, may be used as a virtual substrate.
The use of a low germanium content Si1-yGey buffer layer for the growth of high germanium content Si1-xGex layers also confers an additional beneficial biaxial strain, which acts as a mobility booster, to the subsequently grown channel layers in a way that can benefit both n-FET (for a tensile Si channel) and p-FET (for a compressive SiGe channel) devices.
For a strain relaxed Si1-yGey buffer layer to serve as a template for the subsequent compressive Si1-xGex (or tensile silicon) growth and that can meet stringent semiconductor fabrication processing needs, it is desirable for the buffer layer to have a smooth and defect-free surface and also for the buffer layer to be 100% relaxed. That is, in addition to being smooth and defect-free, the buffer layer should not be under compressive or tensile strain.
The requirements of a smooth, defect-free surface and 100% lattice relaxation are difficult to meet at the same time. Typically, strain in a semiconductor layer is released through the formation of threading dislocations (TD), which are crystal defects, in the semiconductor material. That is, when a Si1-yGey layer (hereinafter, simply a SiGe layer) is formed on a silicon substrate, relaxation may occur as a result of the generation of defects in the SiGe layer. As long as the SiGe layer is thicker than a corresponding critical thickness, hc, misfits at the interface between the silicon substrate and the SiGe buffer layer lead to the formation of threading dislocations in the SiGe buffer layer that release strain induced by the large lattice-mismatch between the SiGe layer and the silicon substrate.
This relaxation is illustrated, for example, in FIG. 1, which is a graph of critical thickness hc of a SiGe layer on a silicon substrate as a function of germanium concentration, x, in the layer. See D. Houghton, J. Appl. Phys. 70, 2136 (1991). Below the critical thickness, in the stable or metastable range, no or minimal relaxation occurs, and the SiGe layers remain pseudomorphically strained to the underlying silicon layer. Above the critical thickness, however, the SiGe layer relaxes due to the formation of defects in the material. As can be seen in FIG. 1, the critical thickness hc decreases as the concentration of germanium in the material increases.